ECC (Elliptic Curve Cryptography) engine supporting NIST P-256 curves. SHA-1 and SHA-256 hardware acceleration. AES-128 and AES-256 encryption support.
Although no official current draw figures are publicly released, the NPCT750 is designed as a low‑power device, typical of TPM chips. It operates from a standard 3.3V supply and consumes very little current in its idle state. This makes it suitable for battery‑powered devices, laptops, and embedded systems where power efficiency is essential.
The chip contains bank arrays of PCRs (both SHA-1 and SHA-256 banks). PCRs are unique because they cannot be written to directly; they can only be "extended." npct750 datasheet
A subtle but vital inclusion is the graphs. These curves (e.g., supply current vs. frequency, output voltage vs. load current) are not guaranteed but are invaluable for predictive design. For the NPCT750, a graph showing ADC effective number of bits (ENOB) versus sampling rate might reveal that 12-bit performance collapses at rates above 100 kSPS—information that never appears in the main tables.
Usually available in a compact VQFN-32 or TSSOP-28 package, saving valuable PCB real estate. NPCT750 Pinout Overview Although no official current draw figures are publicly
Several electronic component distributors provide a copy of the datasheet after registration or upon request:
: Fully compliant with TCG TPM 2.0 (Revision 1.38 and others). The chip contains bank arrays of PCRs (both
High-throughput support for SHA-1 and SHA-256 algorithms, vital for generating cryptographic measurements.
Community developers have successfully added the NPCT750 to custom carrier boards for the Raspberry Pi Compute Module 4 (CM4). By writing a custom device tree source (DTS) file with the "nuvoton,npct75x" compatible string, the Linux kernel properly initializes the TPM over SPI, enabling security features on the popular single‑board computer.